The present invention relates generally to semiconductor packaging. More particularly, improved package on package fabrication techniques and designs are described.
Some semiconductor packaging designs contemplate stacking two or more packaged devices on top of one another. For example, a packaged memory device may be stacked on top of a packaged processor as shown in FIGS. 1(a) and 1(b). In the illustrated arrangement, the top package 100 has solder bumps 101 on its bottom surface 102 facing the bottom package 110. The solder bumps 101 are formed on I/O pads (not shown). The bottom package has a BGA substrate 111 that supports a die 112. The BGA substrate 111 has contact pads 113 on its top surface 115 that are complementary to the solder bumps on top package 100. During assembly of a stacked package on package (PoP) device 120, the top package 100 is placed on the bottom package 110 and the solder bumps 101 are reflowed to form contacts 124 between the I/O pads on the top package 100 and the contact pads 113 as illustrated in FIG. 1(b). Although this approach works well in many applications, warping of either the top or bottom package can sometimes result in one or more contacts not being properly formed, resulting in an “open” contact type defect 125 as diagrammatically illustrated in FIG. 1(b).
Another package stacking approach is illustrated in FIGS. 2(a) and 2(b). In this approach, the top package 100 is generally similar to the top package illustrated in FIGS. 1(a) and 1(b). The bottom package 210 is somewhat similar to the bottom package illustrated in FIGS. 1(a) and 1(b) except that the contact pads 113 on the top surface 115 of BGA substrate 111 are bumped to form solder bumps 217 and the top side of the BGA substrate is overmolded. That is, a molding/encapsulating material 218 such as epoxy encapsulates the die 112 and solder balls 217 on the top surface of the BGA substrate 111 (the die may or may not be exposed). The molding material 218 helps stiffen the package thereby reducing warping. Laser ablation is then used to remove molding material around bumps 217 on the lower package as diagrammatically illustrated in FIG. 2(b). In this state, the top package 100 is placed over the bottom package 210 and the facing solder bumps 101, 217 are reflowed such they join together to form solder joint contacts 224 between the I/O pads on the top package 100 and contact pads on the bottom package 210 as diagrammatically illustrated in FIG. 2(b). Again, this approach works well in many applications. However, the ablation process tends to leave some molding material dust, which can contaminate some of the solder joints as illustrated by joint 224(a) in FIG. 2(b). Such contamination is another type of defect that can result in an open contact type defect or a poor connection. Another drawback of the molding/ablation approach is that the ablation forms troughs or well around the solder balls. Such recesses can be hard to clean and sometimes retain cleaning solution which can have corrosive effects on the solder ball surface and solder joints. Furthermore, a wall of molding material 218(a) to the outside of the solder joints impairs visual inspection of the solder joints after reflow. Therefore, although current package stacking approaches work well in many applications, there are continuing efforts to develop more reliable, low cost packaging designs.